Andri, Renzo; Cavigelli, Lukas; Rossi, Davide; Benini, Luca, YodaNN: An ultra-low power convolutional neural network accelerator based on binary weights, in: Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, IEEE Computer Society, 2016, 2016-, pp. 236 - 241 (atti di: 15th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016, usa, 2016) [Contributo in Atti di convegno]
Rossi, Davide; Pullini, Antonio; Loi, Igor; Gautschi, Michael; Gurkaynak, Frank Kagan; Teman, Adam; Constantin, Jeremy; Burg, Andreas; Miro Panades, Ivan; Beign, Edith; Clermidy, Fabien; Abouzeid, Fady; Flatresse, Philippe; Benini, Luca, 193 MOPS/mW @ 162 MOPS, 0.32V to 1.15V voltage range multi-core accelerator for energy efficient parallel and sequential digital processing, in: 19th IEEE Symposium on Low-Power and High-Speed Chips, IEEE COOL Chips 2016 - Proceedings, Institute of Electrical and Electronics Engineers Inc., 2016, pp. 1 - 3 (atti di: 19th IEEE Symposium on Low-Power and High-Speed Chips, IEEE COOL Chips 2016, Yokohama Joho Bunka Center (Yokohama Media and Communications Center), jpn, 2016) [Contributo in Atti di convegno]
Azarkhish, Erfan; Rossi, Davide; Loi, Igor; Benini, Luca, A Modular Shared L2 Memory Design for 3-D Integration, «IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS», 2015, 23, Article number: 6876020, pp. 1485 - 1498 [articolo]
Rossi, Davide; Pullini, Antonio; Gautschi, Michael; Loi, Igor; Gurkaynak, Frank Kagan; Flatresse, Philippe; Benini, Luca, A -1.8V to 0.9V body bias, 60 GOPS/W 4-core cluster in low-power 28nm UTBB FD-SOI technology, in: Proceedings of the 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S, New York, Institute of Electrical and Electronics Engineers Inc., 2015, CFP15SOI-ART, pp. 1 - 3 (atti di: IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015, Rohnert Park, CA, USA, 5-8 October 2015) [Contributo in Atti di convegno]Open Access
Teman, Adam; Rossi, Davide; Meinerzhagen, Pascal; Benini, Luca; Burg, Andreas, Controlled placement of standard cell memory arrays for high density and low power in 28nm FD-SOI, in: 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, Institute of Electrical and Electronics Engineers Inc., 2015, pp. 81 - 86 (atti di: 2015 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, Chiba, jpn, 2015) [Contributo in Atti di convegno]
Loi, Igor; Rossi, Davide; Haugou, Germain; Gautschi, Michael; Benini, Luca, Exploring multi-banked shared-l1 program cache on ultra-low power, tightly coupled processor clusters, in: Proceedings of the 12th ACM International Conference on Computing Frontiers, CF 2015, Association for Computing Machinery, Inc, 2015, pp. 1 - 8 (atti di: 12th ACM International Conference on Computing Frontiers, CF 2015, Ischia, Ita, 2015) [Contributo in Atti di convegno]
Azarkhish, Erfan; Rossi, Davide; Loi, Igor; Benini, Luca, High Performance AXI-4.0 Based Interconnect for Extensible Smart Memory Cubes, in: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015, 2015, pp. 1317 - 1322 (atti di: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015, Grenoble, 9-13 March 2015) [Contributo in Atti di convegno]
Gomez, Andres; Pinto, Christian; Bartolini, Andrea; Rossi, Davide; Benini, Luca; Fatemi, Hamed; Gyvez, Jose Pineda de, Reducing Energy Consumption in Microcontroller-Based Platforms with Low Design Margin Co-Processors, in: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015, 2015, pp. 269 - 272 (atti di: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015, Grenoble, 9-13 March 2015) [Contributo in Atti di convegno]
Tagliavini, Giuseppe; Rossi, Davide; Benini, Luca; Marongiu, Andrea, Synergistic architecture and programming model support for approximate micropower computing, in: Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, IEEE Computer Society, 2015, 07-10-, pp. 280 - 285 (atti di: IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2015, Montpellier, France, 2015) [Contributo in Atti di convegno]
Gautschi, Michael; Rossi, Davide; Benini, Luca, Customizing an open source processor to fit in an ultra-low power cluster with a shared L1 memory, in: Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI, Association for Computing Machinery, 2014, pp. 87 - 88 (atti di: 24th Great Lakes Symposium on VLSI, GLSVLSI 2014, Houston, TX, usa, 2014) [Contributo in Atti di convegno]
Rossi, Davide; Loi, Igor; Conti, Francesco.; Tagliavini, Giuseppe; Pullini, Antonio.; Marongiu, Andrea, Energy efficient parallel computing on the PULP platform with support for OpenMP, in: Proceedings of 2014 IEEE 28th Convention of Electrical & Electronics Engineers in Israel (IEEEI), IEEE, 2014, pp. 1 - 5 (atti di: 2014 IEEE 28th Convention of Electrical & Electronics Engineers in Israel (IEEEI), Eilat (Israele), 3-5 Dec. 2014) [Contributo in Atti di convegno]
Conti, Francesco; Rossi, Davide; Pullini, Antonio; Loi, Igor; Benini, Luca, Energy-efficient vision on the PULP platform for ultra-low power parallel computing, in: IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation, Institute of Electrical and Electronics Engineers Inc., 2014, pp. 1 - 6 (atti di: 2014 IEEE Workshop on Signal Processing Systems, SiPS 2014, Queen's University Belfast, gbr, 2014) [Contributo in Atti di convegno]
Bortolotti, Daniele; Bartolini, Andrea; Weis, Christian; Rossi, Davide; Benini, Luca, Hybrid memory architecture for voltage scaling in ultra-low power multi-core biomedical processors, in: Conference Design, Automation and Test in Europe (DATE), IEEE Publisher 2014, 2014, pp. 1 - 6 (atti di: 17th Design, Automation and Test in Europe, DATE 2014, Dresden; Germany, 24 March 2014 through 28 March 2014;) [Contributo in Atti di convegno]
D. Rossi; C. Mucci; M. Pizzotti; L. Perugini; R. Canegallo; R. Guerrieri, Multicore Signal Processing Platform
With Heterogeneous Configurable
Hardware Accelerators, «IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS», 2014, 22, pp. 1990 - 2003 [articolo]
Rossi, Davide; Loi, Igor; Haugou, Germain; Benini, Luca, Ultra-low-latency lightweight dma for tightly coupled multi-core clusters, in: Proceedings of the 11th ACM Conference on Computing Frontiers, CF 2014, Association for Computing Machinery, 2014, pp. 1 - 10 (atti di: 11th ACM International Conference on Computing Frontiers, CF 2014, Cagliari, ita, 2014) [Contributo in Atti di convegno]
