03716 - Digital Design Principles and Computer Architecture

Learning outcomes

The course aims to give a reference framework on which project and understand the behavior of simple microprocessor systems, focusing on:

• functional principles
• fundamental of computer architecture
• the impact of architecture on performance
• design techniques

Functional to the aims of the course will be the ability to analyze and synthesize logical networks by acquiring the principles and methods ruling the logic design of digital machines.

Also if the course is basically an hardware course, the mutual interaction between low level software and hardware will be underlined. Without taking in count the specific course subjects, the main goal of the course is to help the student learning one of the basic skill, abstracting, needed by a Computer Science Engineer, in order to be able to manage complex projects. Abstracting will be used to represent in the most efficient and hierarchical way the essence of a computer system.

Course contents

• Binary Information Encoding
• Analysis and synthesis of combinational, asynchronous and synchronous logical networks
• Finite State Machine
• Basic Functional Principles of Computer
• Von Neumann Abstract Model
• Program and data: Computer Execution Model
• Addressing of Memory and I/O devices
• Computer Architecture
• ISA (Instruction Set Architecture)
• Machine Languages: general considerations
• RISC and CISC Architectures
• Performances and impact of architecture on it
• DLX: a sequential implementation of a RISC CPU
• Design of microprocessor systems
  

Readings/Bibliography

• R. Laschi, M. Prandini: "Appunti di Reti Logiche", Esculapio 2007
• Hennessy Patterson: "Computer architecture: a quantitative approach" - Morgan Kaufmann pub. Inc., second edition
• Giacomo Bucci: “Architetture dei calcolatori elettronici” McGraw-Hill

Teaching methods

Starting from a description of the functional principles of computers, the course will underline the basic components of the computer hardware by following a "top-down" approach. A "bottom-up" study of logical networks will be functional on defining the basic modules taking part to the internal design of a CPU. At the end, the relationships between the CPU and the other computer functional blocks, e.g. memory and I/O devices, will be studied along with the mutual relationship between software and hardware.

Assessment methods

Students will have to pass an exam consisting in some design exercises. In the middle of the course students can have a not mandatory intermediate test. Students who will pass this test will be granted to have, at the end of the course, a partial exam on the topics of the second half of the course.

Teaching tools

Lectures will be supported by projected slides, available for download. On the course web site will be published news to allert students of particular events. On the web sites will be also available texts and solutions of past exams.

Links to further information

http://didattica.arces.unibo.it/course/view.php?id=73

Office hours

See the website of Luca Roffia