- Docente: Giovanni Neri
- Credits: 6
- SSD: ING-INF/05
- Language: Italian
- Teaching Mode: Traditional lectures
- Campus: Bologna
- Corso: First cycle degree programme (L) in Computer Engineering (cod. 0051)
Learning outcomes
The course aimes at providing students with a basic knowkedge of microprocessor architecture and of the electornic circuits involved. As an example a simple RISC processor, 8088 microprocessor and few integrated peripherals are analysed. Interfacing techinques are presented for simple devices. At the end of the cours students can design and implements and program simple control systems.
Course contents
Microprocessor evolution - Modern design techniques - Processor hierarchy - RISC and CISC architectures - Architecturse vs. languages - Memories and address decoding techniques - Sequential control units - Pieplined control unites - I8088 microprocessor - I/O handling - Integrated peripheral devices: UART. Parallel port - interrupt controller
Readings/Bibliography
Hennessy Patterson -Computer architecture: a quantitative approach - Caps. 1..5
Morgan Kaufmann pub. Inc.
Giacomo Bucci Architetture dei calcolatori elettronici McGraw-Hill - Caps. 1..9
Giacomo Bucci - Architettura e organizzazione dei calcolatori elettronici
Teaching methods
Room lectures with slides projection. Copy of the slides can be found at http://deis48.deis.unibo.it
Assessment methods
Exam consists of two written tests (test1 and test2) related to the first and second part of the course. The second test is considered only if the first test is positive (both tests can passed in the same day). Test validity is one year. During the course an intermediate test can be passed which is equivalent to test1. Registration to the written tests via UNIWEX is mandatory with no exception.
Teaching tools
On http://deis48.deis.unibo.it sudents can find:
1) Course slides
2) Exam papers with solutions
3) Communications
Links to further information
Office hours
See the website of Giovanni Neri